Rainbow Electronics T89C51AC2 User Manual

Page 95

T89C51AC2

Rev. B – 19-Dec-01

Notes:

1. Operating I

is measured with all output pins disconnected; XTAL1 driven with

CLCH

, T

CHCL

= 5 ns (see Figure 44.), V

= V

+ 0.5 V,

= V

- 0.5V; XTAL2 N.C.; EA = RST = Port 0 = V

. I

would be slightly higher

if a crystal oscillator used (see Figure 41.).

2. Idle I

is measured with all output pins disconnected; XTAL1 driven with T

CLCH

CHCL

= 5 ns, V

= V

+ 0.5 V, V

= V

- 0.5 V; XTAL2 N.C; Port 0 = V

; EA = RST

= V

(see Figure 42.).

3. Power Down I

is measured with all output pins disconnected; EA = V

, PORT 0 =

; XTAL2 NC.; RST = V

(see Figure 43.). In addition, the WDT must be inactive

and the POF flag must be set.

4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be super-

imposed on the V

s of ALE and Ports 1 and 3. The noise is due to external bus

capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0
transitions during bus operation. In the worst cases (capacitive loading 100pF), the
noise pulse on the ALE line may exceed 0.45V with maxi V

peak 0.6V. A Schmitt

Trigger use is not necessary.

5. Typicals are based on a limited number of samples and are not guaranteed. The val-

ues listed are at room temperature.

6. Under steady state (non-transient) conditions, I

must be externally limited as fol-

lows:
Maximum I

per port pin: 10 mA

Maximum I

per 8-bit port:

Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total I

for all output pins: 71 mA

If I

exceeds the test condition, V

may exceed the related specification. Pins are

not guaranteed to sink current greater than the listed test conditions.

Logical 1 to 0 Transition Current,
ports 1, 2, 3 and 4

-650

Vin = 2.0 V

Capacitance of I/O Buffer

Fc = 1 MHz
T

= 25

Power Down Current

160

350

4.5V < V

5.5V

(3)

Power Supply Current

CCOP

= 0.7 Freq (MHz) + 3 mA

CCIDLE

= 0.6 Freq (MHz) + 2 mA

Symbol

Parameter

Min

Typ

(5)

Max

Unit

Test Conditions