Rainbow Electronics T89C51AC2 - Manual (Page 55)

55
T89C51AC2
Rev. B – 19-Dec-01
12.5 Registers Table 20. TCON Register
TCON (S:88h)
Timer/Counter Control Register
Reset Value= 0000 0000b
7 6 5 4 3 2 1 0
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
Bit
Number
Bit
Mnemonic Description
7 TF1
Timer 1 Overflow Flag
Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on Timer/Counter overflow, when Timer 1 register overflows.
6 TR1
Timer 1 Run Control Bit
Clear to turn off Timer/Counter 1.
Set to turn on Timer/Counter 1.
5 TF0
Timer 0 Overflow Flag
Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on Timer/Counter overflow, when Timer 0 register overflows.
4 TR0
Timer 0 Run Control Bit
Clear to turn off Timer/Counter 0.
Set to turn on Timer/Counter 0.
3 IE1
Interrupt 1 Edge Flag
Cleared by hardware when interrupt is processed if edge-triggered (see IT1).
Set by hardware when external interrupt is detected on INT1# pin.
2 IT1
Interrupt 1 Type Control Bit
Clear to select low level active (level triggered) for external interrupt 1 (INT1#).
Set to select falling edge active (edge triggered) for external interrupt 1.
1 IE0
Interrupt 0 Edge Flag
Cleared by hardware when interrupt is processed if edge-triggered (see IT0).
Set by hardware when external interrupt is detected on INT0# pin.
0 IT0
Interrupt 0 Type Control Bit
Clear to select low level active (level triggered) for external interrupt 0 (INT0#).
Set to select falling edge active (edge triggered) for external interrupt 0.