3 reading the status byte using *stb, 4 using the message available bit(s), 3 standard event registers – American Magnetics 187 Self-Compensating Liquid Level Controller User Manual
Page 45: Standard event registers, Remote interface reference

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Remote Interface Reference
SCPI Status System
4.2.2.3 Reading the Status Byte using *STB?
The
*STB?
returns the contents of the Status Byte register, but it is
processed in the command queue like any other command. The
*STB?
command returns the same result as a Serial Poll, however bit 6 of the
Status Byte register is not cleared. Issuing an
*STB?
query does not clear
an SRQ condition.
4.2.2.4 Using the Message Available Bit(s)
The “Message Available” bits (bits 3 or 4) of the Status Byte register can be
used to determine when data is available to read into your host computer.
The instrument clears the “Message Available” bits only after all data has
been read from the output buffer(s).
The “Message Available” bits of the Status Byte register are useful for
determining if queries have executed, however, they are not useful alone
for determining if commands have completed execution, since commands
do not provide return data.
4.2.3
Standard Event Registers
The Standard Event register group reports a power-on condition, various
error conditions, and indicates when an operation has completed. Any or
all of the Standard Events can be reported to the Status Byte register by
enabling the corresponding bit(s) in the Standard Event enable register
(see Figure 4-1). To set the Standard Event enable register, write a binary-
weighted decimal value using the
*ESE <
value
>
command.
The bit definitions for the Standard Event register are provided in
Table 4-2. To query the instrument for the details of a reported error in the
Standard Event register, use the
SYSTem:ERRor?
query. See paragraph
4.6 for a complete discussion of the error buffer and messages.
The Standard Event register is cleared when:
W
The
*CLS
(clear status) command is executed.
W
The Standard Event register is queried using the
*ESR?
command.
The Standard Event enable register is cleared when:
W
The
*ESE 0
command is executed.
W
The power is turned off and then back on, and the instrument was
configured for
*PSC 1
(power-on status clear). The enable register
setting is persistent if the Model 187 is configured for
*PSC 0
(no
status clear on power-on).