4 gpio output data register (out_datan), Out_data01), Out_data23) – Texas Instruments TMS320DM644x User Manual
Page 20: Descriptions, Section 3.4
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3.4
GPIO Output Data Register (OUT_DATAn)
Registers
The GPIO output data register (OUT_DATAn) determines the value driven on the corresponding GPIO pin
n in GPIO bank I, if the pin is configured as an output (DIRn = 0). Writes do not affect pins not configured
as GPIO outputs. The bits in OUT_DATAn are set or cleared by writing directly to this register. A read of
OUT_DATAn returns the value of the register not the value at the pin (that might be configured as an
input). The GPIO output data register (OUT_DATA01) is shown in
, OUT_DATA23 is shown in
, OUT_DATA4 is shown in
, and described in
. See
to determine the
OUT_DATAn bit associated with each GPIO bank and pin number.
Figure 7. GPIO Banks 0 and 1 Output Data Register (OUT_DATA01)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
OUT31
OUT30
OUT29
OUT28
OUT27
OUT26
OUT25
OUT24
OUT23
OUT22
OUT21
OUT20
OUT19
OUT18
OUT17
OUT16
R/W-0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
OUT15
OUT14
OUT13
OUT12
OUT11
OUT10
OUT9
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
OUT0
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Figure 8. GPIO Banks 2 and 3 Output Data Register (OUT_DATA23)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
OUT63
OUT62
OUT61
OUT60
OUT59
OUT58
OUT57
OUT56
OUT55
OUT54
OUT53
OUT52
OUT51
OUT50
OUT49
OUT48
R/W-0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
OUT47
OUT46
OUT45
OUT44
OUT43
OUT42
OUT41
OUT40
OUT39
OUT38
OUT37
OUT36
OUT35
OUT34
OUT33
OUT32
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Figure 9. GPIO Bank 4 Output Data Register (OUT_DATA4)
31
16
Reserved
R-0
15
7
6
5
4
3
2
1
0
Reserved
OUT70
OUT69
OUT68
OUT67
OUT66
OUT65
OUT64
R-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 8. GPIO Output Data Register (OUT_DATAn) Field Descriptions
Bit
Field
Value
Description
31-16
OUTn
Output drive state of GPIO pin n. The OUTn bit is used to drive the output (low = 0, high = 1) of pin n on
GPIO bank 2I + 1 only when pin n is configured as an output (DIRn = 0). The OUTn bit is ignored when
GPIO pin n is configured as an input. This bit field configures the GPIO pins on GPIO banks 1 and 3.
0
GPIO pin n is driven low.
1
GPIO pin n is driven high.
15-0
OUTn
Output drive state of GPIO pin n. The OUTn bit is used to drive the output (low = 0, high = 1) of pin n on
GPIO bank 2I only when pin n is configured as an output (DIRn = 0). The OUTn bit is ignored when GPIO
pin n is configured as an input. This bit field configures the GPIO pins on GPIO banks 0, 2, and 4.
0
GPIO pin n is driven low.
1
GPIO pin n is driven high.
20
General-Purpose Input/Output (GPIO)
SPRUE25 – December 2005