5 using a gpio signal as an input – Texas Instruments TMS320DM644x User Manual
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2.5
Using a GPIO Signal as an Input
Peripheral Architecture
2.4.2
Controlling the GPIO Output Signal State
There are three registers that control the output state driven on a GPIO signal configured as an output:
•
GPIO set data register (SET_DATA) controls driving GPIO signals high
•
GPIO clear data register (CLR_DATA) controls driving GPIO signals low
•
GPIO output data register (OUT_DATA) contains the current state of the output signals
Reading SET_DATA, CLR_DATA, and OUT_DATA returns the output state not necessarily the actual
signal state (since some signals may be configured as inputs). The actual signal state is read using the
GPIO input data register (IN_DATA) associated with the desired GPIO signal. IN_DATA contains the
actual logic state on the external signal.
For detailed information on these registers, see
2.4.2.1
Driving a GPIO Output Signal High
To drive a GPIO signal high, use one of the following methods:
•
Write a logic 1 to the bit in SET_DATA associated with the desired GPIO signal(s) to be driven high.
Bit positions in SET_DATA containing logic 0 do not affect the state of the associated output signals.
•
Modify the bit in OUT_DATA associated with the desired GPIO signal by using a read-modify-write
operation. The logic states driven on the GPIO output signals match the logic values written to all bits
in OUT_DATA.
For GPIO signals configured as inputs, the values written to the associated SET_DATA, CLR_DATA, and
OUT_DATA bits have no effect.
2.4.2.2
Driving a GPIO Output Signal Low
To drive a GPIO signal low, use one of the following methods:
•
Write a logic 1 to the bit in CLR_DATA associated with the desired GPIO signal(s) to be driven low. Bit
positions in CLR_DATA containing logic 0 do not affect the state of the associated output signals.
•
Modify the bit in OUT_DATA associated with the desired GPIO signal by using a read-modify-write
operation. The logic states driven on the GPIO output signals match the logic values written to all bits
in OUT_DATA.
For GPIO signals configured as inputs, the values written to the associated SET_DATA, CLR_DATA, and
OUT_DATA bits have no effect.
GPIO signals are configured to operate as inputs or outputs by writing the appropriate value to the GPIO
direction register (DIR). This section describes using the GPIO signal as an input signal.
2.5.1
Configuring a GPIO Input Signal
To configure a given GPIO signal as an input, set the bit in DIR that is associated with the desired GPIO
signal. For detailed information on DIR, see
2.5.2
Reading a GPIO Input Signal
The current state of the GPIO signals is read using the GPIO input data register (IN_DATA).
•
For GPIO signals configured as inputs, reading IN_DATA returns the state of the input signal
synchronized to the GPIO peripheral clock.
•
For GPIO signals configured as outputs, reading IN_DATA returns the output value being driven by the
device.
Some signals may utilize open-drain output buffers for wired-logic operations. For open-drain GPIO
signals, reading IN_DATA returns the wired-logic value on the signal (which will not be driven by the
device alone). Information on any signals using open-drain outputs is available in the device data manual.
To use GPIO input signals as interrupt sources, see section
12
General-Purpose Input/Output (GPIO)
SPRUE25 – December 2005