Texas Instruments TMS320DM644x - Manual (Page 13)

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2.6 Reset Considerations
2.7 Interrupt Support
Peripheral Architecture
The GPIO peripheral has two reset sources: software reset and hardware reset.
2.6.1 Software Reset Considerations
A software reset (such as a reset initiated through the emulator) does not modify the configuration and
state of the GPIO signals.
2.6.2 Hardware Reset Considerations
A hardware reset does reset the GPIO configuration and data registers to their default states; therefore,
affecting the configuration and state of the GPIO signals.
The GPIO peripheral can send an interrupt event to the ARM and/or the DSP.
2.7.1 Interrupt Events and Requests
A subset of the GPIO signals can also be configured to generate interrupts. The DM644x supports
interrupts from single GPIO signals, interrupts from banks of GPIO signals, or both. The interrupt mapping
from the GPIO peripheral to the ARM and DSP CPUs is shown in
Table 2 .
Table 2. GPIO Interrupts to the ARM CPU and DSP CPU
Interrupt Source Acronym ARM Interrupt Number DSP Interrupt Number
GPIO0 GPIO0 48 64
GPIO1 GPIO1 49 65
GPIO2 GPIO2 50 66
GPIO3 GPIO3 51 67
GPIO4 GPIO4 52 68
GPIO5 GPIO5 53 69
GPIO6 GPIO6 54 70
GPIO7 GPIO7 55 71
GPIO Bank 0 GPIOBNK0 56 72
GPIO Bank 1 GPIOBNK1 57 73
GPIO Bank 2 GPIOBNK2 58 74
GPIO Bank 3 GPIOBNK3 59 75
GPIO Bank 4 GPIOBNK4 69 76
2.7.2 Enabling GPIO Interrupt Events
GPIO interrupt events are enabled in banks of 16 by setting the appropriate bit(s) in the GPIO interrupt
per-bank enable register (BINTEN). For example, to enable bank 0 interrupts (events from GPIO[15-0]),
set bit 0 in BINTEN; to enable bank 3 interrupts (events from GPIO[63-48]), set bit 3 in BINTEN.
For detailed information on BINTEN, see Section 3 .
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