National Instruments PXI NI 5401 User Manual
Page 54
Glossary
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National Instruments Corporation
G-7
pipeline
a high-performance processor structure in which the completion of an
instruction is broken into its elements so that several elements can be
processed simultaneously from different instructions
PLL
phase-locked loop—a circuit that synthesizes a signal whose frequency is
exactly proportional to the frequency of a reference signal
PLL Ref
a PLL input that accepts an external reference clock signal and phase locks
to it the NI 5401 internal clock
Plug and Play devices
devices that do not require dip switches or jumpers to configure resources
on the devices—also called switchless devices
ppm
parts per million
pre-attenuation offset
an offset provided to the signal before it reaches the attenuators
protocol
the exact sequence of bits, characters, and control codes used to transfer
data between computers and peripherals through a communications
channel, such as the GPIB bus
PXI
PCI eXtensions for Instrumentation
R
resolution
the smallest signal increment that can be detected by a measurement
system. Resolution can be expressed in bits, in proportions, or in percent of
full scale. For example, a system has 12-bit resolution, one part in 4,096
resolution, and 0.0244 percent of full scale.
RTSI bus
Real-Time System Integration bus—the National Instruments timing bus
that connects DAQ boards directly, by means of connectors on top of the
boards, for precise synchronization of functions
S
s
seconds
S
samples
sampling rate
the rate, in samples per second (S/s), at which each sample in the waveform
buffer is updated