Interrupts, No interrupt requested 1: interrupt requested, Interrupt undetected 1: interrupt detected – Lucent Technologies MN10285K User Manual
Page 62: Disable 1: enable, Rmcid: remote signal receive interrupt detect flag, Rmcie: remote signal receive interrupt enable flag, Adm3ir: address match 3 interrupt request flag, Adm3id: address match 3 interrupt detect flag
Interrupts
Interrupt Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual
Panasonic Semiconductor Development Company
61
Panasonic
RMCICL: Remote Signal Receive Interrupt Control Register (Low)
x’00FC76’
RMCICL detects and requests remote signal receive interrupts. It is an 8-
bit access register. Use the MOVB instruction to access it.
RMCIR: Remote signal receive interrupt request flag
0: No interrupt requested
1: Interrupt requested
RMCID: Remote signal receive interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
RMCICH: Remote Signal Receive Interrupt Control Register (High)
x’00FC77’
RMCICH enables remote signal receive interrupts. It is an 8-bit access regis-
ter. Use the MOVB instruction to access it.
The priority level for remote signal receive interrupts is written to the
TM2UDLV[2:0] field of the TM2UDICH register.
RMCIE: Remote signal receive interrupt enable flag
0: Disable
1: Enable
ADM3ICL: Address 3 Match Interrupt Control Register (Low)
x’00FC78’
ADM3ICL detects and requests address match 3 interrupts. It is an 8-bit
access register. Use the MOVB instruction to access it.
ADM3IR: Address match 3 interrupt request flag
0: No interrupt requested
1: Interrupt requested
ADM3ID: Address match 3 interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
Bit:
7
6
5
4
3
2
1
0
—
—
—
RMC
IR
—
—
—
RMC
ID
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R/W
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
RMC
IE
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R/W
Bit:
7
6
5
4
3
2
1
0
—
—
—
ADM3
IR
—
—
—
ADM3
ID
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R/W
R
R
R
R