FUJITSU MHK2090AT - Manual (Page 161)

Interface
5-88 C141-E088-03EN
g) Ultra DMA data in burst
The device should not invert the state of this signal in the period from the
moment of STOP signal negation or HDMARDY-signal assertion to the
moment of inversion of the first STROBE signal.
5.5.2.2 Data transfer phase
a) The Data transfer phase is defined as the period from The Ultra DMA burst
initiation phase to Ultra DMA burst termination phase.
b) The receiving side stops the Ultra DMA burst temporarily by negating
DMARDY-signal, and then restarts the Ultra DMA burst by asserting again.
c) The transmitting side stops the Ultra DMA burst temporarily by not-
performing inversion of STROBE signal, and then restarts the Ultra DMA
burst by restarting the inversion.
d) When the transmitting side has stopped the inversion of STROBE signal, the
receiving side should not output termination request signal immediately.
The receiving side should negate DMARDY signal when no termination
request signal has been received from the transmission side, and then should
output the termination request signal when a certain wait time has elapsed.
e) The transmitting side is allowed to send STROBE signal at a transfer speed
that is lower than the one in the transferable fastest Ultra DMA mode, but is
not allowed to send the STROBE signal at a higher speed than this.
The receiving side should be able to receive the data in the transferable fastest
Ultra DMA mode.
5.5.2.3 Ultra DMA burst termination phase
a) The transmitting side or receiving side is allowed to end the Ultra DMA
burst.
b) The Ultra DMA burst termination is not the end of the command execution.
When the Ultra DMA burst termination has occurred before the ending of the
command, the command should be ended by starting a new Ultra DMA burst,
or the host should issue command abort by outputting hard reset or soft reset
to the device.
c) The Ultra DMA burst should be stopped temporarily before the receiving side
outputs the ending request.
d) The host outputs the ending request by asserting STOP signal, and then the
device negates DMARQ signal to confirm it.
e) The device outputs the ending request by negating DMARQ signal, and then
the host asserts STOP signal to confirm it.