HP Q153090901 - Manual (Page 85)

MODE SELECT 15h/55h
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85
Fibre Channel Port Control mode page
NOTE: This page is supported for Fibre Channel only.
The Fibre Channel Port Control page allows you to set the initialization and addressing behavior of
the Fibre Channel interface.
7 6 5 4 3 2 1 0
0 PS (0) Rsvd (0) Page Code {19h}
1 Page Length {06h)
2 Reserved (0) Protocol Identifier (FCP=0)
3 DTFD (0) PLPB(0) DDIS(0) DLM(1) RHA(0) ALWLI(0) DTIPE(0) DTOLI(0)
4
Reserved (0)
5
6
Reserved (0) RR_TOV Units (3)
7 Resource Recovery Time-Out Value—RR_TOV (F0h, that is, 24s)
DTFD Disable Target Fabric Discovery. If the drive is not attached to an arbitrated loop, the
DTFD bit is ignored.
0 When attached by an arbitrated loop, the drive will discover a fabric loop port if
one is present on the loop and perform public loop functions.
1 When attached by an arbitrated loop, the drive will not recognize the presence of
a fabric loop port on the loop. The drive performs only the private loop functions.
PLPB Prevent Loop Port Bypass
0 The drive allows the Loop Port Bypass (LPB) and Loop Port Enable (PBE) primitive
sequences to control the port bypass circuit.
1 The drive ignores any Loop Port Bypass (LPB) and Loop Port Enable (LPE) primitive
sequences. The loop port remains enabled. When the PLPB bit is zero, the drive
allows the LPB and PBE primitive sequences to control the port bypass circuit.
NOTE: If the PLPB bit is set to 1, the DTIPE bit must be set to 0.
DDIS Disable Discovery
0 The drive must wait to receive an Address Discovery Link Service (ADISC) or Port
Discovery Link Service (PDISC) before it resumes processing tasks for the initiator.
1 The drive does not require receipt of Address or Port Discovery following loop
initialization. The drive resumes processing of tasks on completion of loop
initialization.
DLM Disable Loop Master.
0 The drive may become loop master during the loop initialization process.
1 The drive will never attempt to be a loop master; it only repeats LISM frames it
receives. This allows the initiator to be loop master during loop initialization.