Chipset, Chapter 4, Bios settings – Lanner FX-3210 User Manual
Page 38
33
Bios Settings
Chapter 4
Network Application Platforms
Chipset
The chipset menu will let you further configure your Intel
CPU and PCH capabilities:
PCH I/O Configuration
It shows the model name and version of the Intel Platform
Controller Hub on the system.
USB Configuration
Item
Selection
EHCI1/EHCI2
The EHCI specification describes a host
controller that correctly supports all
compliant USB 2.0 low-, full-, and high-
speed devices. Select to either enable
or disable the controller.
SLP_S4 Assertion Width
Select the mininum assertion width of the SLP_S4# signal.
This field indicates the minimum assertion width of the
SLP__S4# signal to ensure that the DRAM modules have
been safely power-cycled. SLP_S4# is a signal for power
plane control. This signal shuts off power to all non-critical
systems when in the S4 (Suspend to Disk) or S5 (Soft Off)
state.