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2 instructions (mnemonics and pseudo-instructions) – Epson S5U1C62000A User Manual

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S5U1C62000A MANUAL

EPSON

53

(S1C60/62 FAMILY ASSEMBLER PACKAGE)

CHAPTER 5: ASSEMBLER

5.5.2 Instructions (Mnemonics and Pseudo-instructions)

The assembler supports all the mnemonics of the S1C6200 instruction set and the assembler pseudo-
instructions. The following shows how to describe the instructions.

Mnemonics

An instruction is generally composed of [mnemonic] + [operand]. Some instructions do not contain an
operand.

General notation forms of instructions

General forms:


tab or space

tab or space ,

Examples:

nop5

jp

SUB1

ld

a,0x4

There is no restriction as to where the description of a mnemonic should begin in a line. A tab or space
preceding a mnemonic is ignored.

An instruction containing an operand needs to be separated into the mnemonic and the operand with
one or more tabs or spaces. If an instruction requires multiple operands, the operands must be
separated from each other with one comma (,). Space between operands is ignored.

The elements of operands will be described further below.

Types of mnemonics

The following 46 types of mnemonics can be used in the S1C62 Family:

acpx acpy adc add and call calz cp dec di ei fan halt inc jpba jp lbpx ld
ldpx ldpy nop5 nop7 not or pop pset push rcf rdf ret retd rets rlc rrc rst
rzf sbc scf scpx scpy sdf set slp sub szf xor

For details on instructions, refer to the "S1C6200/6200A Core CPU Manual".

Note

The assembler is commonly used for all the S1C62 Family models, so all the instructions can be
accepted. Be aware that no error will occur in the assembler even if instructions or operands unavail-
able for the model are described. They will be checked in the linker.

Assembler pseudo-instructions

The assembler pseudo-instructions are not converted to execution codes, but they are designed to
control the assembler or to set data.
For discrimination from other instructions, all the assembler pseudo-instructions begin with a sharp
(#) or a period (.).

General notation forms of pseudo-instructions

General forms:


tab or space

tab or space tab, space or comma ...

Examples:

#define

SW1

1

.org

0x100

.comm

BUF

4

There is no restriction as to where the description of an instruction may begin in a line.

An instruction containing a parameter needs to be separated into the instruction and the parameter
with one or more tabs or spaces. If an instruction requires multiple parameters, they are separated
from each other with an appropriate delimiter.