Reset, Sync loss, Errored seconds – Verilink PRISM 41TDM (34-00275.4) Product Manual User Manual
Page 34: Bit error, Time, Sync, Local loop, Far v.54 loop, V.54 loop, Dte-a loop
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DTE B - DTE - Initiates a BERT towards the DTE port B. DTE port A (if in TDM
mode) is not affected.
Reset
When set to Yes, the BERT error counts and elapsed time values are cleared to
zero. This parameter then returns to No automatically.
Sync Loss
Displays the number during the test period that the BERT pattern detector lost
sync.
Errored Seconds
Displays the errored seconds that have been detected since the test began or since
error statistics were last cleared.
Bit Error
Displays the total bit errors detected since the test began or since error statistics
were last cleared.
Time
Displays the elapsed time since a timed test began. A value is displayed only when
a test is running. The format is HH:MM:SS.
Sync
Displays the current state of pattern sync during a test. If no test is in progress,
then No Test is displayed.
Local Loop
When set to On, the near-end local loop is activated. The choices are On and Off.
Far V.54 Loop
When set to On, the V.54 loop pattern is transmitted out to the network. The
choices are On and Off.
V.54 Loop
When set to On, the near-end V.54 loop is activated. The choices are On and Off.
DTE-A Loop
When set to On, the DTE-A loop is activated. The choices are On and Off. This
loop is always toward the network. If loop mode is set to Bidirectional, it is
towards the DTE-A also.
DTE-B Loop
When set to On, the DTE-B loop is activated. The choices are On and Off. This
loop is only available in the TDM mode and also tracks the loop mode settings.