Verilink FrameStart FSD (34-00291.F) Product Manual - Manual (Page 39)

O p e r a t i o n 33
TXCC Clock
This is used to enable or disable generation of the TXCC clock from the unit
to the DTE.
DTE Data
In the invert mode, transmit and receive data are inverted at the port interface.
This function can be used as a means of guaranteeing ones density when the
data is composed of SDLC- type protocols. The default setting is normal.
CTS
Setting this field to Forced On allows the forcing of the port control lead
output state. Normal allows for normal operation where CTS follows the
transition of RTS.
CTS Delay
This field allows setting the delay from when RTS is asserted to when CTS is
asserted. The delay ranges from 000 to 255 milliseconds in one-millisecond
increments. Setting this field to 000 means RTS and CTS are asserted
simultaneously.
DCD
Setting this field to Forced On allows the forcing of the port control lead
output state. Normal allows for normal operation.
DSR
Setting this field to Forced On allows the forcing of the port control lead
output state. Normal allows for normal operation.
DTR
Setting this field to Forced On allows the forcing of the port control lead
output state. Ignored allows for normal operation.
T1 Network Configuration
The Network Configuration menu (see Figure 4.3 on page 24) allows
establishing parameters for connection with the T1 network.
Framing
Selects the type of framing for the network interface as D4 or ESF.