Research Concepts RC2500 - Manual (Page 82)

RC2500 Antenna Controller Appendix D RCI RS-422 Specification 75
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All permissible transitions between states are represented graphically by arrows between them. Each
transition is qualified by a condition that must be true in order for the transition to occur. The device will
remain in its current state if conditions which qualify transitions leading to other states are false, or
conditions that qualify pseudo-transitions are true. A pseudo-transition is a transition that occurs within
the same state and is represented graphically by arrows leaving from and arriving at the same state.
Table 1 describes mnemonics used to identify transitions in the state diagram.
Table 1. State Diagram Mnemonics
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Mnemonics Description
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STX Start-of-Text ASCII control character, used as a header in command messages
to identify the beginning of a new message.
ETX End-of-Text ASCII control character, used as a termination character in
messages to identify the end of data.
Checksum LRC byte (Longitudinal Redundancy Check) is a last byte in the message data block. The
value of LRC byte is the exclusive OR of all message bytes including the STX
and the ETX bytes and is used to detect errors during transmission of data.
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States Description
State 1 (Slave Idle State). In State 1, a slave is ready to receive a new message, and therefore, must
complete any previous message reception. A slave always powers on in State 1.
A slave will exit State 1 and enter State 2 (Slave Addressed State) only if STX byte is received.
State 2 (Slave Addressed State). In State 2, a slave is waiting to receive the address byte, the second
byte of a command message.
A slave will exit State 2 and enter:
• State 3 (Slave Data State) if received address byte equals a slave's address.
• State 1 (Slave Idle State) if received address byte does not equal a slave's address.
• State 2 (remain in current state) if STX byte is received, which may be the beginning of a
new message data block.
State 3 (Slave Data State). In State 3, a slave is engaged in receiving the command and associated data
bytes sent by a master-controller.
A slave will exit State 3 and enter:
• State 4 (Slave Data Error State) if ETX byte is received signifying the end of data in the
message.
• State 1 (Slave Idle State) if invalid command, or data character, or incorrect number of
data bytes is received.
State 4 (Slave Data Error State). In State 4, a slave is waiting to receive a Checksum byte which tests
the transmitted message for errors.
A slave will exit State 4 and enter: