Measurement Computing DaqBoard 3000USB Series - Manual (Page 126)

B-6 Signal Modes and System Noise 938390 Appendix B
If an acquisition’s scan group includes both high level signals and low level signals, here are some tips on
how to reduce the amount of crosstalk.
• Use as much oversampling as possible.
• Within the scan group, group high level signals together, group low level signals together
• Place a shorted channel in the scan group between the high level signals and the low level
signals. The shorted channel should have the same gain as the last high level signal. This may
allow for a faster scan rate with less oversampling.
Floating Differential Inputs
The DaqBook/3000 series and DaqBoard/3000 series products have fully differential input capability.
However, they are not intended for use as floating differential inputs.
The low input of the differential pair is intended to remotely sense a signal that has a low resistance path to
analog ground (variously referred to as ANALOG COMMON and AGND). Although a resistive path of up
to 50kΩ may be acceptable, a lower resistive path is preferable.
The ideal ground connection is one that is made directly to analog common. But connections to mains-
powered computer grounds have also functioned well.
Oversampling and Line Cycle Rejection
The DaqBoard/3000USB Series boards allow for oversampling and line cycle rejection to be done. When
the units are put into oversampling mode, noise is reduced and ambient 60Hz or 50Hz pick up can be
rejected. When enabled, oversampling is adjustable from 2 to 16384. The more oversampling that is done,
the less noise present in the readings. Line cycle rejection is just another mode of oversampling where
16384; 8192; 4096; etc. consecutive samples are averaged over one line cycle of 50Hz or 60Hz.
When oversampling is employed it is done for all analog channels in the scan group: voltage, temperature,
CJC, and autozero. Digital channels are not oversampled. Increasing the amount of oversampling will
drastically decrease the maximum allowable scan rate. During acquisitions, the system controller reads
each of the channel entries in the scan list and measures each channel according to the desired channel
number and gain. If oversampling is enabled, the acquisition engine reads each of the channel entries in the
scan list and takes multiple consecutive measurements without changing the channel or gain. All
consecutive 16-bit measurements are averaged and then returned to the software.
In the case of line cycle rejection, the acquisition engine adjusts the conversion time of the ADC slightly so
that 16384; 8192; 4096; etc. samples will fit inside one line cycle of 50 Hz (20ms) or 60Hz (16.666ms.)