In table 7 – BECKHOFF ET9300 User Manual
Page 58
56
Application Note ET9300
Table 7: Supported Sync Modes
Sync Type
AL_EVENT_ENABLED
DC_SUPPORTED
Sync0/1 Activation
(Reg. 0x981)
Sync0 Cycle time
(Reg. 0x9A0:0x9A3)
Sync1 Cycle time
(Reg. 0x9A4:0x9A7)
0
--
Bit0:7: 0
--
1
--
Bit0:7: 0
--
1
1
Bit0: 1
Bit1: 1
Bit2:7: --
--
1
1
Bit0: 1
Bit1: 1
Bit2: 1
Bit3:7: --
Sync0Cycle >= Sync1Cycle
0
1
Bit0: 1
Bit1: 1
Bit2:7: --
--
0
1
Bit0: 1
Bit1: 1
Bit2: 1
Bit3:7: --
--
1
1
Bit0: 1
Bit1: 1
Bit2: 1
Bit3:7: --
Sync0Cycle < Sync1Cycle
*:
Default sync type if no CoE is supported.
In the following chapters the supported synchronization modes are described. The terms and values in
the figures are:
-
PDO_OutputMapping(): Copies the output process data from the SM2 buffer to the local
memory and calls APPL_OutputMapping(). See chapter 6 for further details.
-
ECAT_Application(): Calls the function APPL_Application(). See chapter 6 for further details.
-
PDO_InputMapping(): Calls the function APPL_InputMapping(). See chapter 6 for further
details. Copy the input process data from the local memory to the SM3 buffer.
-
0x1C32.6 / 0x1C33.6 (Calc and Copy Time): Required time to copy the process data from the
ESC to the local memory and calculate the output value. This can be defined by
“PD_OUTPUT_CALC_AND_COPY_TIME and “PD_INPUT_CALC_AND_COPY_TIME”.
-
0x1C32.9 / 0x1C33.9 (Delay Time): Delay from receiving the trigger to set the output or latch
the input. This c
an be defined by “PD_OUTPUT_DELAY_TIME” and
“PD_INPUT_DELAY_TIME”.
-
0x1C32.2 / 0x1C33.2 (Cycle Time): When using DC synchronization the value is read from
register 0x9A0:0x9A3.
-
0x1C32.5 / 0x1C33.5 (Min Cycle Time): Minimum cycle time for the application. This can be
specified by “MIN_PD_CYCLE_TIME”. It is the total execution time of all slave application
related operations. In the SSC it is the PDO_OutputMapping(), ECAT_Application() and
PDO_InputMapping().