Avery Dennison RFID - Manual (Page 9)

HowToRFID
Revision: 13 Date: 31 August 2009
Page 9 of 53
Manufacturer Tag type
Name
ID
Memory Blocksize
in byte Nr of blocks
(user data) Standard
HF Technology
I•CODE 1 (A) 2 512 bit 4 16 (11) 1 proprietary
I•CODE SLI (A) 3 1024 bit 4 32 (28) 2 ISO 15693
I•CODE EPC (B) 7 96 bit EPC / no UID 1 17 proprietary
NXP (Philips)
I•CODE UID (B) 8 192 bit / with UID 1 24 (12) proprietary
Tag-it HF * 256 bit 4 8 proprietary Texas Instruments
Tag-it HF ISO (A) 4 2048 bit 4 66 (64) 3 ISO 15693
My-d (A) 1 10240 bit 10 (8) 4 128 (125) 5 ISO 15693 Infineon
My-d V2 (A) 1 10240 bit 4 256 (250) ISO 15693
UHF Technology
Matrics (1) EPC class 0 5 64 / 96 bit EPC na na proprietary
Alien (1) EPC class 1 6 64 / 96 bit EPC na na proprietary
U•CODE EPC 1.19 10 64/96 bit EPC + 256 bit user data 1 32 proprietary NXP (Phillips) (1)
U•CODE HSL 11 2048 bit 4 64 proprietary
Impinj (1) Zuma / EPC class 0+ 12 64/96 bit EPC + up to 64 bit user data 2 depending on
EPC size proprietary
Various EPC class 1 Gen2 15 64..240 bit EPC (+ available user data) 2 0 / 14 / 32 6 EPC class 1
Gen2
Table 1 – Supported transponder types
Key: Text not longer supported
(option) (A) or (B) = different module options, one per module supported
(1) only supported by semi custom firmware (not standard firmware version X.33 and later)
2.3 Hardware prerequisites
For the different RFID technologies, printers and printer generations there are RFID upgrade options available. See the
following list of part numbers.
Application Country Description Variant Part number
Option for 64-04 X1237
Option for 64-05 X1232
HF WW (13.56 MHz)
Option for 64-06 X1238
Option for 64-04/05 X1443
Option for 64-06 X1444
Option for AP 5.4 X1445
Option for ALX/DPM 4/5" LH/RH X1446
EU (869.525 MHz)
Option for ALX/DPM 6" LH/RH X1447
Option for 64-04/05 X1448
Option for 64-06 X1449
Option for AP 5.4 X1450
UHF
US (915 MHz)
Option for ALX/DPM 4/5" LH/RH X1451
1 5 blocks are reserved internally. They are hidden from the user. There is an effective block range from 0 up to 10.
2 4 blocks are reserved internally. They are hidden from the user. There is an effective block range from 0 up to 27.
3 There is an effective block range from 0 up to 63.
4 There are 2 extra bytes for each block reserved for administration purposes. From an user point of view there are 8 bytes per block.
5 The first three blocks are reserved for internal purposes - for example ISO unique identification number (UID). These blocks are NOT hidden
from the user. These blocks cannot be written, but can be read. There is an effective block range from 0 up to 127. Block 0 contains UID.
6 NXP / Philips chips only