Altera Nios Development Board Stratix II Edition - Manual (Page 30)

2–20 Reference Manual Altera Corporation
Nios Development Board Stratix II Edition May 2007
Board Components
Table 2–12 , Figure 2–8 and Figure 2–9 show connections from the
PROTO2 expansion headers to the FPGA. Unless otherwise noted, the
labels indicate FPGA pin numbers
Figure 2–8. PROTO2 Expansion Prototype Connector - J15, J16 & J17
J12
J7 3 J12 proto1_io40
L3 4 J12 proto1_io29
M1 5 J12 proto1_io30
M2 6 J12 proto1_io31
G6 7 J12 proto1_io32
G7 8 J12 proto1_io33
H5 9 J12 proto1_io34
H6 10 J12 proto1_io35
J5 11 J12 proto1_io36
J6 12 J12 proto1_io37
H7 13 J12 proto1_io38
H8 14 J12 proto1_io39
J13
U2 pin 19 9 J13 proto1_osc
K6 11 J13 proto1_pllclk
R26 13 J13 proto1_clkout
Table 2–11. PROTO1 Pin Table (Continued)
FPGA Pin PROTO1 Pin Connector Board Net Name
Pin 1
J15
J17
J16
Pin 1
Pin 1