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Configuration data, Safe & user configurations – Altera Nios Development Board User Manual

Page 30

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1–22

Altera

Corporation

Nios Development Board Reference Manual, Cyclone Edition

December 2004

Configuration Controller Device (EPM7128AE)

When SW9 (Force Safe) is pressed, the configuration controller
immediately begins configuring the Cyclone FPGA from the safe
configuration in flash memory—data in the EPCS4 and in the user
hardware image are ignored.

Most users will never need to re-program the configuration controller
design in the EMP7128AE device. Reprogramming the configuration
controller may result in an inoperable development board. A
programming file (config_controller.pof) with the original configuration
controller logic is included with the Nios II development kit. If you have
changed the EPM7128AE device logic, you can restore the factory
configuration using this programming file located in the EPM7128_PS_
config

folder of the examples directory for this board.

f

See the MAX 7000 family literature at www.altera.com/literature/lit-
m7k.html

for detailed information about the Altera EPM7128AE device.

Configuration Data

FPGA configuration data files are generated by the Quartus II software.
You can write new configuration data to the board’s flash memory using
the Nios II IDE.

f

For details on programming configuration data to flash memory, see the
Nios II Flash Programmer’ User Guide or refer to the Nios II IDE online
help.

Safe & User Configurations

The configuration controller can manage three separate Cyclone device
configurations: one configuration stored in the EPSC4 configuration
device, and two configurations stored in flash memory. These two
configurations stored in flash memory are conventionally referred to as
the safe configuration and the user configuration.

The configuration controller expects user configuration and safe
configuration files to be stored at fixed locations (offsets) in flash memory.

Table 1–7 on page 1–25

shows how the configuration controller expects

flash memory contents to be arranged.

1

A Nios II reference design is factory programmed into the safe-
configuration region of the flash memory. Altera recommends
that users avoid overwriting the safe configuration data.