Altera 100G Development Kit, Stratix IV GT Edition - Manual (Page 5)

September 2010 Altera Corporation 100G Development Kit, Stratix IV GT Edition Reference Manual
1. Overview
The 100G Development Kit, Stratix ® IV GT Edition allows you to evaluate the
performance the Stratix IV GT transceivers and the low power benefits of the device
itself. This document provides the detailed pin-out and component reference
information required to create FPGA designs that interface with all components on
the board.
f For information about setting up the Stratix IV GT 100G development board and
using the included software, refer to the
100G Development Kit, Stratix IV GT Edition
User Guide .
General Description
The Stratix IV GT 100G development board provides a hardware platform for
evaluating the performance and signal integrity features of the Altera
® Stratix IV GT
devices. The board features the following major component blocks:
■ EP4S100G5F45I1 FPGA
■ 0.95-V core
■ 1932-Pin FineLine BGA ® (FBGA) package
■ EPM2210F324C3N, MAX II 256-pin CPLD
■ FPGA Configuration
■ MAX ® II+Flash Fast Passive Parallel (FPP) configuration
■ 1-Gb flash storage for two configuration images (factory and user)
■ On-Board USB-Blaster TM using the Quartus ® II Programmer
■ JTAG header for external USB-Blaster with the Quartus II Programmer
■ On-Board Memory
■ Four 2-Gb DDR3 SDRAM
■ Four 72-Mb QDR II SRAM
■ Status and Setup Elements
■ FPGA Clock Sources
■ Clock Outputs and Triggers
■ General User Input/Output