Altera Transceiver SI - Manual (Page 23)

Altera Corporation Getting Started User Guide 2–15
June 2006 Transceiver Signal Integrity Development Kit, Stratix II GX Edition
Getting Started
Three different data pattern generators—PRBS7, PRBS23, and high
frequency alternate 1s and 0s—are available for all channels. Data
checking is only available for the PRBS7 and PRBS23 pattern generators.
Error statistics are reported to the demo application by the checkers.
Serial Loopback Settings
Immediately to the right of the Data Pattern settings are the Serial
Loopback
settings. Serial loopback is available for all the channels and
can be controlled during run time.
1 After the serial loopback status in the GUI is changed, the Data
Chk Status
box may indicate Unsync’d for some channels due
to the asynchronous nature of the serial loopback signal. In this
scenario, the Data Pat Rst should be asserted to synchronize the
error checker with the transmitted data.
Reset Settings
Immediately to the right of the Serial Loopback settings are the Reset
settings, which are defined below:
■ System Rst —Reset for the transceiver
1 After System Rst is asserted, the Data Chk Status box may
show Unsync’d for some channels due to the asynchronous
nature of the reset. In this scenario, the Data Pat Rst should be
asserted to synchronize the error checker with the transmitted
data.
■ Error Cnt Rst —Reset for all the error counters to zero
■ SIIGX Temp —This field shows the Stratix II GX device’s junction
temperature.
1 Also, when the you change the data patterns in the Data
Patterns
field (depending on the specified channel), the error
counters will be reset. For example, in the Ch1.,Ch4 Pattern
field, if you change PRBS7 to PRBS23, the error counters are
reset for all four channels.
RX CRU Rx_Freqlocked Lock to Settings
The middle center of the control panel window is the RX CRU
rx_freqlocked Lock to
: settings. This field shows whether the
transceiver’s CRU is locked to the reference clock or to the data. When the