Altera PowerPlay Early Power Estimator - Manual (Page 46)

3–32 Altera Corporation
PowerPlay Early Power Estimator For Arria GX FPGAs May 2008
Power Analysis
Figure 3–22 shows the total thermal power in Watts and the static power
(P
static
) consumed by the device. The thermal power for each section is
also displayed. To see how the thermal power for a section was
calculated, click on the section to view the inputs entered for that section.
Figure 3–22. Thermal Power in the PowerPlay Early Power Estimator
Table 3–12 describes the thermal power parameters in the PowerPlay
Early Power Estimator.
Table 3–12. Thermal Power Section Information
Column Heading Description
Logic This shows the dynamic power consumed by ALMs and associated routing. Click Logic to
see details.
RAM This shows the dynamic power consumed by RAMs blocks and associated routing. Click
RAM to see details.
DSP This shows the dynamic power consumed by DSP blocks and associated routing. Click
DSP to see details.
I/O This shows the thermal power consumed by I/O pins and associated routing. This includes
static power dissipated in terminated I/O standards on chip and stand-by power dissipated
in I/O banks. Click I/O to see details.
HSDI This shows the dynamic power consumed by SERDES hardware for high-speed
differential I/O. Click HSDI to see details.
PLL This shows the dynamic power consumed by PLLs. Click PLL to see details.
Clocks This shows the dynamic power consumed by clock networks. Click Clocks to see details.
XCVR This shows the thermal power consumed by transceiver hardware. This includes the
standby power consumed by unused transceivers. Click XCVR to see details.