Altera DSP Development Kit, Stratix V Edition - Manual (Page 26)

6–2 Chapter 6: Board Test System
Preparing the Board
DSP Development Kit, Stratix V Edition July 2013 Altera Corporation
User Guide
After successful FPGA configuration, the appropriate tab appears and allows you to
exercise the related board features. Highlights appear in the board picture around the
corresponding components.
The Power Monitor button starts the Power Monitor application that measures and
reports current power and temperature information for the board. Because the
application communicates over the JTAG bus to the MAX V device, you can measure
the power of any design in the FPGA, including your own designs.
1 The Board Test System and Power Monitor share the JTAG bus with other
applications like the Nios II debugger and the SignalTap
® II Embedded Logic
Analyzer. Because the Quartus II programmer uses most of the bandwidth of the
JTAG bus, other applications using the JTAG bus might time out. Be sure to close the
other applications before attempting to reconfigure the FPGA using the Quartus II
Programmer.
Preparing the Board
With the power to the board off, following these steps:
1. Connect the USB cable to the board.
2. Ensure that the board DIP switches are set to default positions as shown in the
“Factory Default Switch Settings” section starting on page 4–2 , except for DIP
switch SW5.3.
3. Set the DIP switch SW5.3 to the on (user) position.
f For more information about the board’s DIP switch and jumper settings,
refer to the
DSP Development Kit, Stratix V Edition Reference Manual .
4. Turn on the power to the board. The board loads the design stored in the user
hardware 1 portion of flash memory into the FPGA. If your board is still in the
factory configuration, or if you have downloaded a newer version of the Board
Test System to flash memory through the Board Update Portal, the design loads
the GPIO and flash memory tests.
c
To ensure operating stability, keep the USB cable connected and the board
powered on when running the demonstration application. The application
cannot run correctly unless the USB cable is attached and the board is on.
Running the Board Test System
To run the application, navigate to the dir>\kits\stratixVGS_5sgsmd5kf40_dsp\examples\board_test_system directory
and run the BoardTestSystem.exe application.
1 On Windows, click Start > All Programs > Altera > DSP Development Kit, Stratix V
Edition
<version> > Board Test System to run the application.
A GUI appears, displaying the application tab that corresponds to the design running
in the FPGA. The Stratix V GS development board’s flash memory ships
preconfigured with the design that corresponds to the GPIO and Flash tabs.