Altera DSP Development Kit, Stratix V Edition - Manual (Page 17)

July 2013 Altera Corporation DSP Development Kit, Stratix V Edition
User Guide
4. Development Board Setup
The instructions in this chapter explain how to set up the Stratix V GS development
board.
Setting Up the Board
To prepare and apply power to the board, perform the following steps:
1. The Stratix V GS development board ships with its board switches preconfigured
to support the design examples in the kit. If you suspect your board might not be
currently configured with the default settings, follow the instructions in
“Factory
Default Switch Settings” on page 4–2 to return the board to its factory settings
before proceeding.
2. The development board ships with design examples stored in the flash memory
device. Verify the DIP switch SW5.3 is set to the off position to load the design
stored in the factory portion of flash memory.
Figure 4–2 shows the DIP switch
location on the back of the Stratix V GS development board.
3. Verify that the HSMC card is installed on port A (connector J1) of the board.
4. Verify that the HSMC card is installed on port B (connector J2) of the board.
5. Ensure that the power switch SW2 is in the off position.
6. Connect the Power Adpater +19 V, 6.32 A to the DC Power Jack (J4) on the FPGA
board and plug the cord into a power outlet.
c
Use only the supplied power supply. Power regulation circuitry on the
board can be damaged by power supplies with greater voltage.
7. Set the POWER switch (SW2) to the on position. When power is supplied to the
board, Power blue LED (D24) illuminates indicating that the board has power.
The MAX V device on the board contains (among other things) a parallel flash loader
(PFL) megafunction. When the board powers up, the PFL reads a design from flash
memory and configures the FPGA. The DIP switch SW5.3 controls which design to
load. When the switch is in the off position, the PFL loads the design from the factory
portion of flash memory.
1 The kit includes a MAX V design which contains the MAX V PFL megafunction. The
design resides in the dir>\kits\stratixVGS_5sgsmd5kf40_dsp\examples\max5 directory.
When configuration is complete, the Config Done LED (D17) illuminates, signaling
that the Stratix V GS device configured successfully.
f For more information about the PFL megafunction, refer to AN 386: Parallel Flash
Loader Megafunction User Guide .