Samtec high-speed bull’s eye connector, Samtec high-speed bull’s eye connector –29 – Altera Arria V GX FPGA User Manual
Page 51
Chapter 6: Board Test System
6–29
Samtec High-speed Bull’s Eye Connector
July 2012
Altera Corporation
Arria V GX FPGA Development Kit
User Guide
5. Click Start to download the selected file to the FPGA. Configuration is complete
when the progress bar reaches 100%.
1
Using the Quartus II programmer to configure a device on the board causes other
JTAG-based applications such as the Board Test System and the Power Monitor to lose
their connection to the board. Restart those applications after configuration is
complete.
Samtec High-speed Bull’s Eye Connector
This kit has a Samtec Bull’s Eye connector with transceivers and a clock output from
the clock buffer (U25).
f
For details on the pinout, refer to the
For details on how to use the Bull’s Eye interface, refer to the Altera
Arria V GX platforms page on the Samtec website