Altera Arria V GT FPGA - Manual (Page 25)

Chapter 6: Board Test System 6–3
Running the Board Test System
November 2012 Altera Corporation Arria V GT FPGA Development Kit
User Guide
Running the Board Test System
To run the application, navigate to the dir>\kits\arriaVGT_5agtfd7kf40_fpga\examples\board_test_system directory and
run the BoardTestSystem.exe application.
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On Windows, click Start > All Programs > Altera > Arria V GT FPGA Development
Kit
<version> > Board Test System to run the application.
A GUI appears, displaying the application tab that corresponds to the design running
in the FPGA. The Arria V GT FPGA development board’s flash memory ships
preconfigured with the design that corresponds to the GPIO tab.
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If you power up your board with your own design programmed into the FPGA with
the Quartus II Programmer, you receive a message prompting you to configure your
board with a valid Board Test System design. Refer to
“The Configure Menu” for
information about configuring your board.
Using the Board Test System
This section describes each control in the Board Test System application.
The Configure Menu
Use the Configure menu ( Figure 6–2 ) to select the design you want to use. Each design
example tests different functionality that corresponds to one or more application tabs.
To configure the FPGA with a test system design, perform the following steps:
1. Make sure there are no conflicts between the Quartus II software version and the
Board Test System GUI version.
Figure 6–2. The Configure Menu