Altera Advanced SEU Detection IP Core - Manual (Page 18)

Altera Advanced SEU Detection IP Core Parameters
Parameter
Group
Parameter
Description
Name Legal Value
General
CRC error cache depth 2, 4, 8,16, 32,
64
• Specifies how many non-critical cyclic
redundancy check (CRC) error to ignore.
• Default value is 8.
Largest ASD region ID 1 to 16
• Indicates the largest ASD SEU detection
region ID in your design.
• Configures the width of the
regions_report
port.
• Default value is 1.
Sensitivity
Data
Access
Use on-chip sensitivity
processing
ON, OFF
• Configures the IP core to use on-chip
sensitivity processing or off-chip sensitivity
processing.
• When enabled, implements an external
memory interface in the IP.
Memory interface
address width
—
• Specifies width of the address bus connected
to the external memory interface.
• Default value is 32.
Sensitivity data start
address
—
• Specifies the offset added to all addresses the
external memory interface generates.
• Default value is 0x0.
SEU Mitigation on CRAM Array
Critical applications require an SEU recovery strategy. The Quartus II software provides SEU detection,
and allows you to design a recovery response to reduce SEU disruption.
Enabling the Advanced SEU Detection Feature in the Quartus II Software
To enable the Advanced SEU Detection feature in the Quartus II software and generate an .smh , turn on
Generate SEU sensitivity map file (.smh) in the Device and Pin Options dialog box (Assignments >
Device > Device and Pin Options).
Hierarchy Tagging
The Quartus II hierarchy tagging feature enables customized soft error classification by indicating design
logic susceptible to soft errors. Hierarchy tagging improves design-effective FIT rate by tagging only the
critical logic for device operation. You also define the system recovery procedure based on knowledge of
logic impaired by SEU. This technique reduces downtime for the FPGA and the system in which the
FPGA resides. Hierarchy tagging is available only for Arria V, Cyclone V, Stratix V, and later device
families.
18 Altera Advanced SEU Detection IP Core Parameters
ALTADVSEU
2015.05.04
Altera Corporation Altera Advanced SEU Detection IP Core User Guide
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