Altera RAM-Based Shift Register - Manual (Page 16)

2–10 Chapter 2: Getting Started
Design Example: Shift Register with Taps
RAM-Based Shift Register (ALTSHIFT_TAPS) Megafunction User Guide May 2013 Altera Corporation
View the simulation results in the Wave window. Figure 2–7 shows the expected
simulation results in the ModelSim-Altera software.
Understanding the Simulation Results
In this example, you configured the shift register to have the following properties:
■ 8-bit data width
■ Distance between taps (taps length) equals to 3
■ Number of taps equals to 4
■ Created groups for each tap output
■ Created a clock-enable signal and an asynchronous-clear signal
This example shows how you can tap the 1st-4th-7th-10th data words simultaneously
(followed by the 2nd-5th-8th-11th and 3rd-6th-9th-12th) when all 12 words of data are
shifted into the shift register.
Figure 2–8 shows the shift register chain that is analogous to the configuration you set
in the ALTSHIFT_TAPS megafunction in this example.
The next section uses this shift register chain to explain the shifting operation and the
output operation of the ALTSHIFT_TAPS megafunction.
Figure 2–7. Simulation Waveform for Shift Register with Taps Design Example
Figure 2–8. Shift Register Chain Analogy to the Configured ALTSHIFT_TAPS Megafunction