Flash memory tab, Cfi query – Altera Cyclone III FPGA Starter Kit User Manual
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Altera Corporation
Cyclone III FPGA Starter Kit User Guide
July 2010
Flash Memory Programmer
Flash Memory Tab
To use the flash memory functions, click the Flash Memory tab
(
).
Figure 3–4. Control Panel Flash Memory Tab
CFI Query
The common flash interface (CFI) flash memory devices conform to basic
flash commands. The most basic command is Query which switches the
device into a ROM table mode so that features of the flash device are
determined by reading values from the table.
To perform a CFI query using the host application, click CFI Query.
Notice that the memory table displays contents that correlate with the
table contents as described in the device datasheet.
To put the flash device back in user mode, press Reset on the control
panel.
See also other documents in the category Altera Measuring instruments:
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- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
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- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
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- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
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- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
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- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
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- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)