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Altera User Flash Memory User Manual

Page 9

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Description

Configuration Setting

You can choose AHDL(.tdf), VHDL(.vhd), or Verilog HDL (.v) as the output
file type.

Which type of output file do
you want to create?

Specify the name of the output file.

What name do you want for
the output file?

Turn on this option if you want to return to this page to create multiple IP
cores.

Return to this page for another
create operation

Specifies the device family you chose on page 2a.

Currently selected device
family

Turn on this option to ensure that the device selected matches the device
family that is chosen in the previous page.

Match project/default

Turn on this option if you want to enable the read and write access mode.

Read and write

Turn on this option if you want to enable the read only mode.

Read only

Select the width for the address bus. The maximum size of the address bus
can be 9.

‘addr’ width

Select the width for the data bus. The maximum size of the data bus can be
16.

‘datain’ width

Turn on this option to route the oscillator frequency to an external oscillator
port.

Use ‘osc’ output port

Turn on this option to enable the oscillator enable port.

Use ‘oscena’ input port

• Select Initialize blank memory if you do not want to specify any initializa-

tion file. Select Initialize from hex or mif file to specify the initialization
file. Type the file name or browse for the required file.

• In the Quartus II software, the memory content values from your .hex

or .mif are hard-coded into your ALTUFM IP core variation file when
you generate the IP variation. If you change the contents of your .hex or
.mif after generating the IP variation, these updates will not be reflected
in simulation. This may cause a mismatch between simulation and device
behavior because compilation and program file generation in the Quartus
II software use the current .hex or .mif contents instead of the hard-coded
values.To avoid this mismatch, regnenerate the ALTUFM IP core
whenever you update your .hex or .mif.

Memory content initialization

Specify the oscillator frequency for the user flash memory. This parameter
is used for simulation purposes only. The values are 5.56MHz and 3.33MHz.
If omitted, the default is 5.56MHz.

Oscillator frequency

Specify the erase time in unit of ns. Simulation erase time for the UFM block
can only be from 1600 ns to 999999 ns.

Erase time

Specify the program time in unit ns. Simulation erase time for the UFM
block can only be from 1600 ns to 100000 ns.

Program time

Altera Corporation

Altera User Flash Memory (ALTUFM) IP Core User Guide

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9

Parameter Settings

UG-040105
2014.08.18