Altera User Flash Memory User Manual
Page 10
Description
Configuration Setting
Turn on this option if you want to generate a netlist for your third-party
EDA synthesis tool to estimate the timing and resource usage of the IP core.
If you turn on this option, a netlist file (_syn.v) is generated. This file is a
representation of the customized logic used in the Quartus
II software and provides the connectivity of the architectural elements in
the IP core but may not represent true functionality.
Generate netlist
Specify the types of files to be generated. The Variation file (<function name>
.v) contains wrapper code in the language you specified on page 2a and is
automatically generated. Choose from the following types of files:
• AHDL Include file (<function name>. inc)
• VHDL component declaration file (<function name>.cmp)
• Quartus II symbol file (<function name>.bsf)
• Instantiation template file (<function name>_inst.v)
• Verilog HDL black box file (<function name>_bb.v)
For more information about the wizard-generated files, refer to the
Introduction to Altera IP Cores.
Summary Page
Table 10: ALTUFM_SPI Parameter Settings
Description
Configuration Setting
You can select from the following options: Create a new custom IP core
variation, Edit an existing custom IP core variation, or Copy an existing
custom IP core variation.
Which action do you want to
perform?
Select ALTUFM_SPI from the Memory Compiler category.
Select a IP core from the list
below
Specify the device family that you want to use.
Which device family will you
be using?
You can choose AHDL(.tdf), VHDL(.vhd), or Verilog HDL (.v) as the
output file type.
Which type of output file do
you want to create?
Specify the name of the output file.
What name do you want for the
output file?
Turn on this option if you want to return to this page to create multiple IP
cores.
Return to this page for another
create operation
Specifies the device family you chose on page 2a.
Currently selected device family
Turn on this option to ensure that the device selected matches the device
family that is chosen in the previous page.
Match project/default
Turn on this option if you want to enable the read and write access mode.
Read and write
Turn on this option if you want to enable the read only mode.
Read only
Altera User Flash Memory (ALTUFM) IP Core User Guide
Altera Corporation
UG-040105
Parameter Settings
10
2014.08.18