ADLINK Express-CVC - Manual (Page 32)

Page 32 Express-CVC
4. Non PICMG Connectors on the Module
This connector is a low height flex-edge connector. The overall board real estate required is significantly smaller than the 60-pin XDP debug
port connector. Compared to the 60-pin XDP debug port connector, the 26-pin XDP-SFF connector supports fewer DFX features. This is the
connector recommended for OEM/ODM designs. The 26-pin XDP-SFF debug port supports the following features on a Next Generation
Intel® Atom® Processor based Desktop and Mobile Platform:
• JTAG
• Run Control through dedicated PREQ/PRDY pins
• Reset and Powergood recovery and request signals.
Pin XDP Signal Name Target Signal I/O Pin XDP Signal Name Target Signal I/O
1 OBSFN_A0 PREQ#/BPM[5] O 2 OBSFN_A1 PRDY#/BP M[4] I
3 GND GND NA 4 OBSDTA_A[0] Open NA
5 OBSDATA_A[1] Open NA 6 GND GND NA
7 OBSDATA_A[2] Open NA 8 OBSDATA_A[3] Open NA
9 GND GND NA 10 HOOK0 PWROK I
11 HOOK1 PWRGOOD_REQ O 12 HOOK2 RSVD_K26 (optional) NA
13 HOOK3 Open I 14 HOOK4 Open NA
15 HOOK5 Open I 16 VCCOBS_AB VCC_CPU NA
17 HOOK6 RESET# I 18 HOOK7 DBR# O
19 GND GND NA 20 TDO TDO I
21 TRSTn TRSTn O 22 TDI TDI O
23 TMS TMS O 24 TCK1 Open
25 GND GND NA 26 TCK0 TCK0 O
For design information, refer to Intel Document: Debug Port Design Guide, Intel Document Number 492419.