4 d/a conversion sequence – ADLINK ACL-6128A User Manual

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• Low-Level Programming

3.4 D/A Conversion Sequence

In the ACL-6128A, the A/D conversion can only be controlled by software using
the double buffering concept. That is, the converted data should be stored in
High Byte Register first, and then stored the Low Byte Register.

The procedure of how to initiate and convert digital data to analog output is
listed below:

Define the base address of the ACL-6128A card:

Base_Addr = 0x2C0;

Extract the most signification 4 bits from the converted data then write
to Base_Addr + 0:

High_Byte = Data & 0f00;

outportb( Base_Addr + 0, High_Byte);

Extract the least signification 8 bits from the converted data then write
to Base_Addr + 1:

Low_Byte = Data & 00ff;

outportb( Base_Addr + 1, Low_Byte);

An example program in low-level programming style called 6128IO.C is
included in the Utility and Software Library CD for your reference.