Digilent Basys Board Rev.C User Manual
Page 11
Digilent
Basys Reference Manual
www.digilentinc.com
Copyright Digilent, Inc.
Page 11/12
Doc: 502-107
A VGA controller circuit decodes the output of a horizontal-sync counter driven by the pixel clock to
generate HS signal timings. This counter can be used to locate any pixel location on a given row.
Likewise, the output of a vertical-sync counter that increments with each HS pulse can be used to
generate VS signal timings, and this counter can be used to locate any given row. These two
continually running counters can be used to form an address into video RAM. No time relationship
between the onset of the HS pulse and the onset of the VS pulse is specified, so the designer can
arrange the counters to easily form video RAM addresses, or to minimize decoding logic for sync
pulse generation.
T
S
T
disp
T
pw
T
fp
T
bp
T
S
T
disp
T
pw
T
fp
T
bp
Sync pulse time
Display time
VS pulse width
VS front porch
VS back porch
16.7ms
15.36ms
64 us
320 us
928 us
416,800
384,000
1,600
8,000
23,200
521
480
2
10
29
Symbol
Parameter
Time
Clocks Lines
Vertical Sync
32 us
25.6 us
3.84 us
640 ns
1.92 us
800
640
96
16
48
Clocks
Horizontal Sync
Time
VGA controller signal timings and circuit block diagram
6-pin header connectors
The Basys board provides four 6-pin peripheral module connectors. Each connector provides Vdd,
GND, and four unique FPGA signals.
Several 6-pin module boards that can attach to this connector are available from Digilent, including
speaker boards, H-bridge boards, sensor boards, etc. Please
for more
information.