Kontron ETX-DC - Manual (Page 20)

ETX-DC®/ ETX® Connectors
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4.3.2 Connector X1 Signal Description
PCI Bus
The implementation of this subsystem complies with the ETX® Specification. Implementation information is provided
in the ETX® Design Guide. Refer to the documentation for additional information. The PCI bus with its signals:
AD[31:0], C/BE[3:0]#, DEVSEL#, FRAME#, IRDY#, PAR, GPERR#, REQ[3:0]#, SERR#, STOP#, TRDY#, INT[D:A]# is 5V
tolerant.
USB
Three USB host controllers (two 1.1 UHCI and one EHCI high-speed 2.0 controller) are on the Intel® 82801GB south
bridge device. The USB controllers comply with both versions 1.1 and 2.0 of the USB standard and are backward
compatible. The three controllers implement a root hub, which have two USB ports each.
Configuration
The USB controllers are PCI bus devices. The BIOS allocates required system resources during configuration of the PCI
bus.
Audio
The ETX®-DC PCI audio controller is integrated in the Intel® 82801GB southbridge. The audio codec is compatible
with AC97.
Configuration
The audio controller is a PCI bus device. The BIOS allocates required system resources during configuration of the PCI
device.
Serial IRQ
The serial IRQ pin offers a standardized interface to link interrupt request lines to a single wire.
Configuration
The serial IRQ machine is in “Continuous Mode” per default and can be changed in the BIOS setup, the frame size is 21
frames and the start frame pulse width is 4 clocks.