C bus, Smbus – Kontron COMe-cOHXX User Manual
Page 51
Kontron COMe-cOH2/COMe-cOH6 User’s Guide
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The implementation of this subsystem complies with the COM Express®
specification. For additional implementation information, refer to the PICMG
COM Express® Design Guide on the PICMG website.
The COM Express® Rev 2.0 specification requires the carrier board and the
module to have two current-limiting devices (resistor and diode) between the
battery and the consuming component.
I
2
C Bus
The I
2
C bus implementation supports on- and off-module use. I
2
C is configured
to use one of the SMBus ports on the Fusion Controller Hub. The I
2
C
implementation is an I
2
C master with 7- bit I
2
C addressing, capable of 100 KHz
or 400 KHz operation.
COM Express Rev 2 specifies I
2
C on the standby rail now, so in the S5 state a
carrier board I
2
C master can query the module. The COMe-cOH# module I
2
C bus
is multi-master capable.
For additional information, refer to the PICMG COM Express® Design Guide on
the PICMG website and I
2
C application notes, which are available on the
Kontron website
See Chapter 8, “BIOS Operation” for supported I
2
C features.
SMBus
System Management Bus (SMBus) signals are connected to the SMBus controller,
which is located on the AMD Fusion Controller Hub. The SMBus is a 2-wire, bi-
directional bus (clock and serial data) used for system management tasks such
as reading parameters from a memory card or reading temperatures and voltages
of system components.
The implementation complies with the COM Express® specification. For
additional implementation information, refer to the PICMG COM Express® Design
Guide on the PICMG website