Kontron COMe-bP5020 - Manual (Page 15)

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User Guide
COMe-bP5020
2.2 Memory
2.2.1 DDR3
The COMe-bP5020 supports a soldered, dual-channel (72-bit), Double Data Rate (DDR3) memory with Error Checking and Cor-
recting (ECC) running at up to 1300 MHz (memory error detection and reporting of 1-bit and 2-bit errors and correction of 1-
bit failures). The available memory configuration can be either 4 GB or 8 GB.
2.2.2 Flash Memory
2.2.2.1 SPI Boot Flash
Two 2 MB SPI boot flashes are provided for two separate U-Boot images: a standard SPI boot flash and a recovery SPI boot flash.
The fail-over mechanism for the U-Boot recovery can be controlled via the DIP switch SW1, switch 2. Refer to Chapter 6.8 for
further information.
The SPI boot flashes include a hardware write protection option. If write protection is enabled, writing to the SPI boot flashes
is not possible.
2.2.2.2 SPI OS/User Flash
There is an 8 MB soldered flash memory available for the OS or application usage.
2.2.2.3 NAND Flash
The COMe-bP5020 supports up to 2 GB of soldered SLC-based NAND flash memory. It is optimized for embedded systems pro-
viding high performance, reliability and security.
2.2.2.4 MRAM Memory
The COMe-bP5020 supports 512 kB of MRAM memory (Magnetorestrictive Random Access Memory) for fast non-volatile data
storage.
2.2.2.5 SDHC Socket
The COMe-bP5020 has a microSDHC card socket, J4, which accepts microSD and microSDHC cards up to 32 GB. If used, the card
must be installed prior to installation of the COMe-bP5020 in a system.
If the SDHC interface is routed to the COM Express® connector (via the U-Boot “sconf” command), the onboard socket J4 cannot
be used.
2.2.3 System/User Data EEPROMs
The COMe-bP5020 provides two 64-kBit EEPROMs: one for system data storage and one which is free for user data storage. The
user data EEPROM is accessible via the OS or an application. The system data EEPROM is reserved for system usage.
N O T I C E
The U-Boot code and settings are stored in the SPI boot flashes. Changes made to the U-Boot
settings are available only in the currently selected SPI boot flash. Thus, switching over to
the other SPI boot flash may result in operation with different U-Boot code and settings.