Kontron VMP3 - Manual (Page 75)

VMP3 Configuration
ID 29230, Rev. 01 © 2005 Kontron Modular Computers GmbH Page 4 - 15
29230
.01.UG.VC.050727/091436
P R E L I M I N A R Y
Table 4-18: Delay Timer Control/Status Register
REGISTER NAME DELAY TIMER CONTROL/STATUS REGISTER ACCESS
ADDRESS 0xFFFF A014 R W
BIT POSITION
MSB
7 6 5 4 3 2 1 0
LSB
CONTENT DTC7 DTC6 DTC5 DTC4 DTC3 DTC2 DTC1 DTC0
DEFAULT 0 0 0 0 0 0 0 0
BIT CONTENT STATE DESCRIPTION
0 DTC0
0
The hardware delay timer is operated via one simple 8-bit control/status
register. The following table indicates 1) the possible timing intervals pro-
vided, and 2) when read, the time elapsed since the last trigger/reset of the
timer.
DTC[7:0] Value Accuracy
Bit 0: 1 µs < + 40%
Bit 1: 5 µs < + 8%
Bit 2: 10 µs < + 4%
Bit 3: 50 µs < + 0.8%
Bit 4: 100 µs < + 0.4%
Bit 5: 250 µs < + 0.16%
Bit 6: 0.5 ms < + 0.08%
Bit 7: 1 ms < + 0.04%
1
1 DTC1
0
1
2 DTC2
0
1
3 DTC3
0
1
4 DTC4
0
1
5 DTC5
0
1
6 DTC6
0
1
7 DTC7
0
1