Kontron VMP3 - Manual (Page 72)

Configuration VMP3
Page 4 - 12 © 2005 Kontron Modular Computers GmbH ID 29230, Rev. 01
29230
.01.UG.VC.050727/091436
P R E L I M I N A R Y
4.2.10 Serial Interrupt Pending 1 Register
The Serial Interrupt Pending 1 Register in conjunction with the Serial Interrupt Pending 2
Register is used to identify the source of the pending interrupt request. All serial interrupts are
coupled together to one CPU Interrupt (IRQ8). A logical 1 indicates that an interrupt has been
asserted.
4.2.11 Serial Interrupt Pending 2 Register
The Serial Interrupt Pending 2 Register in conjunction with the Serial Interrupt Pending 1
Register is used to identify the source of the pending interrupt request. All serial interrupts are
coupled together to one CPU Interrupt (IRQ8). A logical 1 indicates that an interrupt has been
asserted.
4.2.12 Serial Interrupt Mask 1 Register
The Serial Interrupt Mask 1 and 2 Registers enable the generation of a CPU interrupt. Writing
a '1' to the bit “SIRQ_ENx” enables the generation of a CPU interrupt and enables the
corresponding bit in the Serial Interrupt Pending 1 and 2 Register.
Table 4-11: Serial Interrupt Pending 1 Register
REGISTER NAME SERIAL INTERRUPT PENDING 1 ACCESS
ADDRESS 0xFFFF A00C R
BIT POSITION
MSB
7 6 5 4 3 2 1 0
LSB
CONTENT SIRQ7 SIRQ6 SIRQ5 SIRQ4 SIRQ3 SIRQ2 SIRQ1 SIRQ0
DEFAULT 0 0 0 0 0 0 0 0
Table 4-12: Serial Interrupt Pending 2 Register
REGISTER NAME SERIAL INTERRUPT PENDING 2 ACCESS
ADDRESS 0xFFFF A00D R
BIT POSITION
MSB
7 6 5 4 3 2 1 0
LSB
CONTENT SIRQ15 SIRQ14 SIRQ13 SIRQ12 SIRQ11 SIRQ10 SIRQ9 SIRQ8
DEFAULT 0 0 0 0 0 0 0 0
Table 4-13: Serial Interrupt Mask 1 Register
REGISTER NAME SERIAL INTERRUPT MASK 1 ACCESS
ADDRESS 0xFFFF A00E R W
BIT POSITION
MS
B
7 6 5 4 3 2 1 0
LS
B
CONTENT
SIRQ_EN
7
SIRQ_EN
6
SIRQ_EN
5
SIRQ_EN
4
SIRQ_EN
3
SIRQ_EN
2
SIRQ_EN
1
SIRQ_EN
0
DEFAULT 0 0 0 0 0 0 0 0