Kontron VSBC-32 - Manual (Page 65)

VSBC-32 Configuration
ID 21168, Rev. 04 Page 4 - 5 © PEP Modular Computers GmbH
4.2 Software Configuration
4.2.1 Address Map
Software applications may require to configure data in the VSBC-32(E) registers. For this pur-
pose, the configurable memory is described in the following. The address map in the table
below is based on the recommended default initialization of the MC68(EN)360 chip select logic.
Figure 4-1: VSBC-32(E) Memory Map
1 If the ROM sockets are selected as the default boot device, then the address 0x 09 xx xx xx, i.e. CS3 of the
MC68[EN[360, is automatically selected as the base address for the flash on the memory piggyback.
2 See the “CXC” appendix of this manual for further addressing information.
Note...
The above shown memory map is PEP default. All other addresses
do not cause CS0..CS7 signals. Therefore access to them leads to
bus errors (BERR).
Furthermore, in order to determine the base of the internal memory
map of the MC68[EN]360 controller, the module base address register
(MBAR) must be set. The location of this register is fixed in the
address area Supervisor CPU Space at 3FF00H. For more informa-
tion on the recommended MC68(EN)360 initialization sequence,
please refer to the Software Installation section in this manual.
Address Memory Device MC68(EN)360
0x 00 xx xx xx DRAM on DRAM/Flash piggyback CS1
0x 04 xx xx xx FLASH on DRAM/Flash piggyback CS0
0x 07 00 0x xx MC68(EN)360 internal RAM register —
0x 09 xx xx xx Flash/EPROM sockets 1 CS3
0x 0A xx xx xx SRAM CS4
0x 0B F7 xx xx CXC 2 CS5
0x 0C xx xx xx Real-time clock CS6
0x 0D xx xx x1 VMEbus IRQ mask register CS7+1
0x 0D xx xx x5 VMEbus control / status register CS7+5
0x 0D xx xx x7 Board control / status register CS7+7
0x 82 xx xx xx VMEbus user-defined AM code CS2
0x 83 xx xx xx VMEbus user-defined AM code CS2
0x 85 00 xx xx VMEbus short I/O AM code CS2
0x 87 xx xx xx VMEbus standard AM code CS2