Test configurations, Design considerations – GE Industrial Solutions Austin MegaLynx SMT User Manual
Page 15

Data Sheet
September 10, 2013
Austin MegaLynx
TM
SMT: Non-Isolated DC-DC Power Modules:
4.5 – 5.5Vdc input; 0.8 to 3.63Vdc Output; 30A output current
6.0 – 14Vdc Input; 0.8Vdc to 3.63Vdc Output; 20/30A output
LINEAGE
POWER
15
Test Configurations
TO OSCILLOSCOPE
CURRENT PROBE
L
TEST
1μH
B
A
TTE
R
Y
C
S
220μF
E.S.R.<0.1
Ω
@ 20°C 100kHz
Min
150μF
V
IN
(+)
COM
NOTE: Measure input reflected ripple current with a simulated
source inductance (L
TEST
) of 1μH. Capacitor C
S
offsets
possible battery impedance. Measure current as shown
above.
C
IN
Figure 43. Input Reflected Ripple Current Test
Setup.
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
V
O
(+)
COM
1uF
.
RESISTIVE
LOAD
SCOPE
COPPER STRIP
GROUND PLANE
10uF
Figure 44. Output Ripple and Noise Test Setup.
V
O
COM
V
IN
(+)
COM
R
LOAD
R
contact
R
distribution
R
contact
R
distribution
R
contact
R
contact
R
distribution
R
distribution
V
IN
V
O
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
Figure 45. Output Voltage and Efficiency Test
Setup.
η =
V
O
. I
O
V
IN
. I
IN
x
100
%
Efficiency
Design Considerations
The Austin MegaLynx
TM
module should be
connected to a low-impedance source. A highly
inductive source can affect the stability of the
module. An input capacitor must be placed directly
adjacent to the input pin of the module, to minimize
input ripple voltage and ensure module stability.
To minimize input voltage ripple, low-ESR ceramic
capacitors are recommended at the input of the
module. Figure 46 shows the input ripple voltage for
various output voltages at 30A of load current with
1x22 µF or 2x22 µF ceramic capacitors and an
input of 12V. Figure 47 shows data for the 5Vin
case, with 2x22µF and 2x47µF of ceramic
capacitors at the input, and for a load current of
30A.
In
p
ut
Ri
pp
le
Vo
lta
g
e
(mV
p
-p)
Output
Voltage
(Vdc)
Figure 46. Input ripple voltage for various
output voltages with 1x22 µF or 2x22 µF ceramic
capacitors at the input (30A load). Input voltage
is 12V.
In
p
ut
R
ipp
le V
o
lta
g
e
(mV
p
-p)
Output
Voltage
(Vdc)
Figure 47. Input ripple voltage in mV, p-p for
various output voltages with 2x22 µF or 2x47 µF
ceramic capacitors at the input (30A load). Input
voltage is 5V.
0
50
100
150
200
250
300
350
0.5
1
1.5
2
2.5
1 x 22uF
2 x 22uF
0
20
40
60
80
100
120
0.5
1
1.5
2
2.5
3
3.5
2 x 22uF
2 x 47uF