7 chip erase – Rainbow Electronics AT45DB021D User Manual
Page 9
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3638K–DFLASH–11/2012
AT45DB021D
the binary page size (25-bytes), an opcode of 7CH must be loaded into the device, followed by three address bytes
comprised of six don’t care bits and seven page address bits (A17 - A11) and 11 don’t care bits. To perform a
sector 1-seven erase, the opcode 7CH must be loaded into the device, followed by three address bytes comprised
of six don’t care bit and three page address bits (A17 - A15) and 16 don’t care bits. The page address bits are used
to specify any valid address location within the sector which is to be erased. When a low-to-high transition occurs
on the CS pin, the part will erase the selected sector. The erase operation is internally self-timed and should take
place in a maximum time of t
SE
. During this time, the status register will indicate that the part is busy.
Table 5-2.
Sector Erase Addressing
5.7
Chip Erase
The entire main memory can be erased at one time by using the Chip Erase command.
To execute the Chip Erase command, a 4-byte command sequence C7H, 94H, 80H and 9AH must be clocked into
the device. Since the entire memory array is to be erased, no address bytes need to be clocked into the device,
and any data clocked in after the opcode will be ignored. After the last bit of the opcode sequence has been
clocked in, the CS pin can be deasserted to start the erase process. The erase operation is internally self-timed
and should take place in a time of t
CE
. During this time, the Status Register will indicate that the device is busy.
The Chip Erase command will not affect sectors that are protected or locked down; the contents of those sectors
will remain unchanged. Only those sectors that are not protected or locked down will be erased.
The WP pin can be asserted while the device is erasing, but protection will not be activated until the internal erase
cycle completes.
Table 5-3.
Chip Erase Command
Figure 5-1.
Chip Erase
PA9/
A17
PA8/
A16
PA7/
A15
PA6/
A14
PA5/
A13
PA4/
A12
PA3/
A11
PA2/
A10
PA1/
A9
PA0/
A8
Sector
0
0
0
0
0
0
0
X
X
X
0a
0
0
0
0
0
0
1
X
X
X
0b
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
0
1
1
X
X
X
X
X
X
X
5
1
0
0
X
X
X
X
X
X
X
6
1
1
1
X
X
X
X
X
X
X
7
Command
Byte 1
Byte 2
Byte 3
Byte 4
Chip Erase
C7H
94H
80H
9AH
Opcode
Byte 1
Opcode
Byte 2
Opcode
Byte 3
Opcode
Byte 4
CS
Each transition
represents 8 bits
SI