Rainbow Electronics MAX5970 User Manual

Page 15

0V to 16V, Dual Hot-Swap Controller with 10-Bit

Current and Voltage Monitor and 4 LED Drivers

MAX5970

______________________________________________________________________________________ 15

Figure 1 shows the detailed logic operation of the hot-
swap enable signals Chx_EN1, Chx_EN2, and ON_, as
well as the effect of various fault conditions.
An input undervoltage threshold control for enabling
the hot-swap channel can be implemented by placing
a resistive divider between the drain of the hot-swap
MOSFET and ground, with the midpoint connected to
ON_. The turn-on threshold voltage for the channel is
then:

= 0.6V x (R1 + R2)/R2

The maximum rating for the ON_ is 6V; do not exceed
this value.

Startup

When all conditions for channel turn-on are met, the
external n-channel MOSFET switch is fully enhanced
with a typical gate-to-source voltage of 5V to ensure
a low drain-to-source resistance. The charge pump at
each GATE_ driver sources 5FA to control the output
voltage turn-on voltage slew rate. An external capacitor
can be added from GATE_ to GND_ to further reduce the
voltage slew rate. Placing a 1kI resistor in series with
this capacitance prevents the added capacitance from
increasing the gate turn-off time. Total inrush current is
the load current summed with the product of the gate
voltage slew rate dV/dt and the load capacitance.

Table 4a. status1 Register Function

Table 4b. status1 Register Format

ADDRESS

BIT

RANGE

DESCRIPTION

0x32

[1:0]

ON_ Inputs State
1 = ON_ above 600mV channel enable threshold
0 = ON_ below 600mV channel enable threshold
Bit 0: ON1
Bit 1: ON2

[4]

Channel Grouping Mode (MODE Input)
0 = Grouped (MODE high or open)
1 = Independent (MODE low)

[7:6]

Voltage Critical Behavior (PROT Input)
00 = Assert ALERT upon UV/OV critical (same as UV/OV warning behavior)
01 = Assert ALERT and deassert PG_ upon UV/OV critical
10 = Assert ALERT, deassert PG_, and shutdown channel(s) upon UV/OV critical
11 = (Not possible)

Description:

Channel grouping (three-state MODE input), fault-detection behavior (three-state PROT input), and
ON_ inputs status register

status1

0x32

RESET
VALUE

prot[1]

prot[0]

—

mode[0]

—

ON2

ON1

0x00

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0