2 secure digital input/output (sdio) test circuit, Table 61, Sdio host in high speed mode ac timing table – Marvel Group Integrated Controller 88F6281 User Manual
Page 113: Figure 37, Secure digital input/output (sdio) test circuit
2 secure digital input/output (sdio) test circuit, Table 61, Sdio host in high speed mode ac timing table | Figure 37, Secure digital input/output (sdio) test circuit | Marvel Group Integrated Controller 88F6281 User Manual | Page 113 / 140
