HP VXI E1432A - Manual (Page 182)

Writing 32-bit Registers
When writing to a 32-bit register using 8- or 16-bit modes, a simple caching
scheme is also employed. On any write not including the least significant
byte (highest address), the data is latched into the write cache. A write to
the least significant byte causes the cached data to be written to the 32-bit
register (in parallel with the current data for the least significant bytes(s).
This mechanism has its own hazards. Writes to the least significant byte
will always include the most recently cashed data, whether intended for
that register or not. Lone writes to the most significant part of a 32-bit
register will be lost if not followed by a write to the least significant part of
the same register. Thus there are two important rules:
1 Always write all 32 bits of a 32-bit register.
2 Always write the least significant part last.
HP E1432A User's Guide
Register Definitions
A-11
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