Verilink DCSU 2911 (880-502647-001) Product Manual - Manual (Page 32)

DCSU T1 Craft Interface
3-10 Verilink DCSU 2911 User Manual
Configuration
Menu (Timing
Options)
Submenu
Display the Configuration Menu (Timing Options) submenu by
typing the command T from the top Configuration Menu. (See
Figure 3-3.)
Figure 3-5 DCSU 2911 Configuration Menu (Timing Options)
The following timing parameters can be chosen from the DCSU:
Table 3-6 Dual CSU 2911 Timing Parameters
An Send/Rec LLB BOP: Enables the Line Loopback Bit-Oriented Protocol (LLB BOP),
used to send loopback signals through the FDL to test the T1 line.
Yes or No
(Y/N)
Bn Send/Rec PLB BOP: Enables the Payload Loopback Bit-Oriented Protocol (PLB
BOP) to use FDL loopbacks to test the far-end CSU.
Yes or No
(Y/N)
X Exit the FDL Configuration screen.
Command Description Options
-- DCSU 2911 CONFIGURATION MENU (TIMING OPTIONS)--
Current shelf timing source: Card 1, INTERNAL (PRIMARY)
Source Synchronization Auto Restore
PRIMARY PS) INTERNAL PA) NO
SECONDARY SS) INTERNAL SA) NO
TERTIARY TS) INTERNAL TA) NO
R) Receive clock from shelf: NO
X) exit this screen
[1,1] DCSU 2911 >
Command Description Options
R Receive Clock from Shelf: Choose whether the DCSU will receive its timing
signal from another module in the shelf, or from an on-board timing
source. See Figure 2-5, Table 2-6.
Yes or No
(Y/N)
PS Primary Synchronization: Choose one of the following as the primary
source for clock synchronization.
Net 1: Network port 1
Net 2: Network port 2
External: External clock
Internal: Internal clock
Net 3: Equipment port 1 TT signal
Net 4: Equipment port 2 TT signal
1) NET 1
2) NET 2
3) EXTERNAL
4) INTERNAL
5) NET 3
6) NET 4