6 pcb layout – Sundance SMT916 User Manual
Page 23

5.3 Clock distribution chips.
Clock distribution chips are used to route the clock used to read samples out of the
ADCs and to generate the ADC conversion signals.
A part from Texas Instrument is used to implement both functions: CDCLVD2106.
They are 2.5V chips and require a maximum of 177mA of current. In order to
provide a clean supply rail two linear regulators will be used (derived from 3.3-Volt
rail on SLB Power connector).
The estimated power dissipated per regulator is 142mW. A regulator of the
TPS793xx family will be suitable but in a bigger package than the ones used for the
converters in order to spread the heat more efficiently.
5.4 Power consumption
The EVP6472-916 system, while running the demo code requires a power a 16.8
Watts (that’s 1.4amps on a 12Volt supply).
6 PCB Layout
6.1 ADC Channel
Below is shown the ADC layout, including opamps, ESD protection, MMCX connector
and individual power supplies.
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