Sundance SMT916 - Manual (Page 15)

A simple 12-bit counter is used to implement this function. It counts up until it
reaches the value loaded in the sampling frequency register.
The counter is enabled by the channel counter enable bits of the global control
register.
Sampling Frequency Register ADC5...0 (Group A) – 0x10 (Read-Write register).
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
1 Reserved Sampling Frequency Register[11...8]
Default “0000” “0000”
0 Sampling Frequency Register[7...0]
Default “00000000”
Sampling Frequency Register ADC5...0 (Group A) – 0x10 (Read-Write register).
Setting Bit 11...0 Description – Sampling Frequency Register ADC5...0
0 Value between 0x19 and 0x9C4 to be programmed, respectively matching with maximum
sampling rate (10MHz) and minimum sampling rate (100KHz) of the ADC. ADC0....5 are
sampling at the same rate.
3.4.5 Conversion rate register channels 6 to 11 – 0x11.
Sampling Frequency Register ADC6...11 (Group B) – 0x11 (Read-Write register).
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
1 Reserved Sampling Frequency Register[11...8]
Default “0000” “0000”
0 Sampling Frequency Register[7...0]
Default “00000000”
Sampling Frequency Register ADC6...11 (Group B) – 0x11 (Read-Write register).
Setting Bit 11...0 Description – Sampling Frequency Register ADC11...6
0 Value between 0x19 and 0x9C4 to be programmed, respectively matching with maximum
sampling rate (10MHz) and minimum sampling rate (100KHz) of the ADC. ADC6....11 are
sampling at the same rate.
3.4.6 Storage Control Register – 0x12
Storage Control Register – 0x12 (Write-only register).
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
1 Reserved Reserved Reserved Reserved Start
Storage
ADC11
Start
Storage
ADC10
Start
Storage
ADC9
Start
Storage
ADC8
Default ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’
0 Start
Storage
ADC7
Start
Storage
ADC6
Start
Storage
ADC5
Start
Storage
ADC4
Start
Storage
ADC3
Start
Storage
ADC2
Start
Storage
ADC1
Start
Storage
ADC0
Default ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’