Sundance SMT310 v.1.6 - Manual (Page 5)

Page 5 of 50 SMT310 User Manual V1.6
Table of Tables
Table 1 : Table of Abbreviations ..................................................................................7
Table 2 : I/O address space map...............................................................................11
Table 3 : Memory space map ....................................................................................12
Table 4 : Memory space map ....................................................................................13
Table 5 : SDB Control Register .................................................................................15
Table 6 : ComPort configuration register ...................................................................17
Table 7 : Comport selection.......................................................................................17
Table 8 : Control Register..........................................................................................19
Table 9 : Status Register ...........................................................................................21
Table 10 : Interrupt Control Register..........................................................................22
Table 11 : JTAG Header pin function.........................................................................26
Table 12 : PCI Interrupt Configuration Register .........................................................37
Table 13 : PCI Interrupt Status Register ....................................................................38
Table 14 : Local Bus Interrupt Mask Register ...........................................................39
Table 15 : Local Bus Interrupt Status Register ..........................................................39
Table 16 : PCI Mailbox WRITE/READ Interrupt Control Register ..............................40
Table 17 : Local Bus Mailbox WRITE/READ Interrupt Control Register ....................40
Table 18 : Mailbox Write/Read Interrupt Status Register...........................................41
Table 19 : INTREG Register ......................................................................................42
Table 20: SDB Pin-out ...............................................................................................46
Table 21 : Buffered ComPort connector pin out.........................................................47
Table 22 : Buffered JTAG connector pin functionality as JTAG master .....................49
Table 23 : Internal JTAG out (XDS-510) pin descriptions ..........................................49